The DFSDM of the STM32H7 or 128 != 16×8 != 8×16 (Part III)

continued from part II:

The passband of CIC filters is not flat. This begs the question of whether this behavior should be corrected. In most cases, the CIC is therefore followed by a so-called CIC compensation filter.

Zooming into the filter plot of the sinc4/dec.15 – sinc5/dec.8-filter shows that the bandwidth of the filter is about 4.6 kHz. The filter response is not flat, but at 2.7 kHz it is only 1 dB down, which should be hardly audible. Seen from this standpoint, a CIC compensation filter seems to be unneccessary.

One can also see that the response at low frequencies is solely determined by the second CIC filter. The green and red curves are barely distinguishable. This means that a compensation filter only has to take into account the frequency response of the second filter.

An Internet search for CIC compensation filters will find the application report AN455 from Intel (formerly: Altera), which describes the calculation of these filters.

Unfortunately, this application note uses Matlab for the calculation, but it was easy to translate the code into Python. In the last section of my Python script you can find the code for calculating the CIC compensation filter.

The next diagram shows that the CIC compensation filter does not only improve the passband response, it also improves the rejection of unwanted frequencies:

The next diagram shows a detailed zoom of the passband region. The transfer function is reasonably flat from DC up to 2 kHz and 3 dB down at approximately 2.8 kHz:

The CIC filter used in this case has 31 taps.

Using more taps improves the steepness of the filter.

Here is an example with 201 taps (which certainly doesn’t bring any audible improvements I think, but it’s fun to calculate):

The last diagram again shows the transfer function of the whole filter assembly (two CIC-filters and a 31-tap compensation filter), but this time shown over the whole frequency range:

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